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1 ? fn7490.1 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2006. all rights reserved. all other trademarks mentioned are the property of their respective owners. el8170, EL8173 micropower, single suppl y, rail-to-rail input-output instrumentation amplifiers the el8170 and EL8173 are micropower instrumentation amplifiers optimized for operation at 2.9v to 5v single supplies. inputs and outputs ca n operate rail-to-rail. as with all instrumentation amplifiers, a pair of inputs provide very high common-mode rejection and are completely independent from a pair of feedback terminals. the feedback terminals allow zero input to be translated to any output offset, including ground. a feedback divider controls the overall gain of the amplifier. the el8170 is compensated for a gain of 100 or more, and the EL8173 is compensated for a gain of 10 or more. the el8170 and EL8173 have bipolar input devices for best offset and 1/f noise performance. the amplifiers can be operated from one lithium cell or two ni-cd batteries. the el8170 and EL8173 input range includes ground to slightly above positive rail. the output stage swings to ground and positive supply - no pull-up or pull-down resistors are needed. pinout el8170, EL8173 (8 ld so) top view features ? 78a maximum supply current ? maximum offset voltage - 250v (el8170) - 1000v (EL8173) ? 500pa input bias current ? 2v/c offset voltage drift ? 396khz -3db bandwidth (g = 10) ? 192khz -3db bandwidth (g = 100) ? 0.5v/s slew rate ? single supply operation - input voltage range is rail-to-rail - output swings rail-to-rail ? output sources and si nks 29ma load current ? 0.2% gain error ? pb-free plus anneal available (rohs compliant) applications ? battery- or solar-powered systems ? strain gauges ? current monitors ? thermocouple amplifiers 1 2 3 4 8 7 6 5 + - + - enable in- in+ vs- fb+ vs+ fb- out data sheet march 9, 2006
2 fn7490.1 march 9, 2006 ordering information part number part marking tape & reel package pkg. dwg. # part number part marking tape & reel package pkg. dwg. # el8170is 8170is - 8 ld so mdp0027 EL8173is 8173is - 8 ld so mdp0027 el8170is-t7 8170is 7? 8 ld so mdp0027 EL8173is-t7 8173is 7? 8 ld so mdp0027 el8170is-t13 8170is 13? 8 ld so mdp0027 EL8173is-t13 8173is 13? 8 ld so mdp0027 el8170isz (see note) 8170isz - 8 ld so (pb-free) mdp0027 EL8173isz (see note) 8173isz - 8 ld so (pb-free) mdp0027 el8170isz-t7 (see note) 8170isz 7? 8 ld so (pb-free) mdp0027 EL8173isz-t7 (see note) 8173isz 7? 8 ld so (pb-free) mdp0027 el8170isz-t13 (see note) 8170isz 13? 8 ld so (pb-free) mdp0027 EL8173isz-t13 (see note) 8173isz 13? 8 ld so (pb-free) mdp0027 note: intersil pb-free plus anneal products employ special pb-free material sets; mo lding compounds/die attach materials and 100 % matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free p roducts are msl classified at pb-free peak reflow temper atures that meet or exceed the pb-free requirements of ipc/jedec j std-020. pin description el8170/EL8173 pin name pin function 1enable active low. when pulled up above 2v, the in-amp conserves 3a disabled supply current and the output is in a high impedance state. an internal pull down defines the enable low when left floating. 2 in- inverting (in-) and non-inverting (in+) high impedance input terminals. 3in+ 4 vs- negative supply terminal. 5 fb- high impedance feedback terminals. the feedbac k terminals have a very similar equivalent circuit as the input terminals. they also hav e an input bias compensation/cancelling circuit. the negative feedback (fb-) pin connects to an exte rnal resistive network to set the gain of the in-amp. the positive feedback (fb+) can be used to shift the dc level of the output or as an output offset. 8fb+ 7 vs+ positive supply terminal. 6 vout output voltage. el8170, EL8173
3 fn7490.1 march 9, 2006 absolute maxi mum ratings (t a = 25c) supply voltage, v s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5v differential input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ma differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5v v en . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5v, v s + + 0.5v esd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kv output short-circuit duration . . . . . . . . . . . . . . . . . . . . . . .indefinite ambient operating temperature . . . . . . . . . . . . . . . .-40c to +85c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v s + = +5v, v s - = gnd, vcm = 1/2v s +, t a = 25c, unless otherwise specified. parameter description conditions min typ max unit v os input offset voltage el8170 100 250 v EL8173 400 1000 v tcv os input offset voltage temperature coefficient temperature = -40c to 85c 2 v/c i os input offset current between in+, and in- and between fb+ and fb- 0.5 2 na i b input bias current (in+, in-, fb+, and fb- terminals) 0.5 2 na e n input noise voltage el8170 f = 0.1hz to 10hz 2 v p-p EL8173 10 v p-p input noise voltage density el8170 f o = 1khz 50 nv/ hz EL8173 200 nv/ hz i n input noise current density f o = 1khz 0.1 pa/ hz r in input resistance el8170 8 m ? EL8173 14 m ? v in input voltage range guaranteed by cmrr test 0 5 v cmrr common mode rejection ratio el8170 v cm = 0v to +5v 80 108 db EL8173 80 104 db psrr power supply rejection ratio el8170 v s = 2.9v to 5v 80 104 db EL8173 70 90 db e g gain error el8170 r l = 100k ? to 2.5v -1.5 +0.3 +1.5 % EL8173 -0.8 +0.2 +0.8 % v out maximum voltage swing output low, 100k ? to 2.5v 0 4 10 mv output low, 1k ? to 2.5v 0.13 0.25 v output high, 100k ? to 2.5v 4.990 4.996 v output high, 1k ? to gnd 4.75 4.88 v sr slew rate r l = 1k ? to gnd 0.3 0.5 0.7 v/s el8170, EL8173
4 fn7490.1 march 9, 2006 -3db bw -3db bandwidth el8170 gain = 100v/v 192 khz gain = 200 93 khz gain = 500 30 khz gain = 1000 13 khz EL8173 gain = 10 396 khz gain = 20 221 khz gain = 50 69 khz gain = 100 30 khz i s,en supply current, enabled 40 60 78 a i s,dis supply current, disabled en = v s +1.52.95a v enh enable pin for shut-down 2 v v enl enable pin for power-on 0.8 v v s minimum supply voltage 2.2 2.4 v i o output current into 10 ? to v s /2 v s = 5v 18 29 ma v s = 2.9v 4 7.5 ma electrical specifications v s + = +5v, v s - = gnd, vcm = 1/2v s +, t a = 25c, unless otherwise specified. (continued) parameter description conditions min typ max unit typical performance curves figure 1. el8170 frequency response vs closed loop gain figure 2. EL8173 frequency response vs closed loop gain g=100 g=50 g=200 g=500 g=1000 gain (db) frequency (hz) 65 60 55 50 45 40 35 30 25 20 1 10 100 1k 10k 100k 1m v s =5v g=5 gain (db) frequency (hz) 45 40 35 30 25 20 15 10 5 0 1 10 100 1k 10k 100k 1m g=100 g=50 g=20 g=10 v s =5v el8170, EL8173
5 fn7490.1 march 9, 2006 figure 3. el8170 frequency response vs supply voltage figure 4. EL8173 frequency response vs supply voltage figure 5. el8170 frequency response vs c load figure 6. EL8173 frequency response vs c load figure 7. el8170 average input bias current vs common-mode input voltage @ 25c figure 8. EL8173 average input bias current vs common-mode input voltage @ 25c typical performance curves (continued) 100 10k 1k 100k 1m 45 40 35 30 25 20 15 10 5 0 frequency (hz) gain (db) v s =2.9v v s =3.3v v s =5v a v =100 r l =10k ? c l =10pf r f /r g =99.02 ? r f =221k ? r g =2.23k ? 100 10k 1k 100k 25 20 15 10 5 0 frequency (hz) magnitude (db) a v =10 r l =10k ? c l =10pf r f /r g =9.08 ? r f =178k ? r g =19.6k ? 1m v s =5v v s =2.9v v s =3.3v 100 10k 1k 100k 50 45 40 35 30 25 frequency (hz) gain (db) c l =820pf a v =100 v s =5v r l =10k ? r f /r g =99.02 ? r f =221k ? r g =2.23k ? 1m c l =56pf c l =470pf c l =220pf 100 10k 1k 100k 30 25 20 15 10 0 frequency (hz) gain (db) c l =100pf a v =10 v s =5v r l =10k ? r f /r g =9.08 ? r f =178k ? r g =19.6k ? 1m c l =2.7pf 5 c l =27pf c l =47pf average input bias current (pa) common-mode input voltage (v) 1500 1000 500 0 -500 -0.5 0 0.5 1.0 1.5 2.0 2.5 v s =2.9v 3.0 3.5 4.0 4.5 5.0 5.5 v s =5.0v v s =3.3v average input bias current (pa) common-mode input voltage (v) 2000 1500 1000 0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v s =5.0v v s =3.3v v s =2.9v 500 el8170, EL8173
6 fn7490.1 march 9, 2006 figure 9. el8170 input offset current vs common- mode input voltage @ 25c figure 10. EL8173 input offset current vs common- mode input voltage @ 25c figure 11. el8170 average input bias current vs common-mode input voltage @ v s = 5v, temperature = -45c, 25c, and 85c figure 12. EL8173 average input bias current vs common-mode input voltage @ v s = 5v, temperature = -45c, 25c, and 85c figure 13. el8170 average input bias current vs common mode input voltage @ v s = 3.3v, temperature = -45c, 25c, and 85c figure 14. EL8173 average input bias current vs common mode input voltage @ v s = 3.3v, temperature = -45c, 25c, and 85c typical performance curves (continued) input offset current (pa) common-mode input voltage (v) 100 -100 -300 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v s =5.0v v s =3.3v v s =2.9v input offset current (pa) common-mode input voltage (v) 100 -100 -300 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v s =2.9v v s =5.0v v s =3.3v average input bias current (pa) common-mode input voltage (v) 1500 1000 500 0 0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -45c 25c v s =5v 85c -500 0 500 1000 1500 2000 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 common-mode input voltage (v) average input bias current (pa) -45c 85c 25c 4.0 4.5 5.0 5.5 -1000 0 500 1000 1500 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 common-mode input voltage (v) average input bias current (pa) 85c -45c 25c -500 v s =3.3v 0 500 1000 1500 2000 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 common-mode input voltage (v) average input bias current (pa) 85c -45c 25c el8170, EL8173
7 fn7490.1 march 9, 2006 figure 15. el8170 average input bias currents vs common-mode input voltage @ v s = 2.9v, temperature = -45c, 25c, and 85c figure 16. EL8173 average input bias currents vs common-mode input voltage @ v s = 2.9v, temperature = -45c, 25c, and 85c figure 17. el8170 input offset voltage vs common- mode input voltage @ v s = 5v, 3.3v and 2.9v and temperature = 25c figure 18. EL8173 input offset voltage vs common- mode input voltage @ v s = 5v, 3.3v, and 2.9v and temperature = 25c figure 19. el8170 input offset voltage vs common- mode input voltage @ v s = 5.0v, temperature = -45c, 25c, and 85c figure 20. EL8173 input offset voltage vs common- mode input voltage @ v s = 5.0v, temperature = -45c, 25c, and 85c typical performance curves (continued) -1000 0 500 1000 1500 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 common-mode input voltage (v) average input bias current (pa) 85c -45c 25c -500 v s =2.9v 0 500 1000 1500 2000 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 common-mode input voltage (v) average input bias current (pa) 85c -45c 25c 0 50 100 150 200 250 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 common-mode input voltage (v) input offset voltage (v) vs=2.9v vs=5v vs=3.3v 25c -1000 -800 -600 -400 -200 0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 common-mode input voltage (v) input offset voltage (v) vs=2.9v vs=5v vs=3.3v 25c 0 50 100 150 200 250 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 common-mode input voltage (v) input offset voltage (v) 85c -45c 25c -1000 -800 -600 -400 -200 0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 common-mode input voltage (v) input offset voltage (v) 25c 85c -45c el8170, EL8173
8 fn7490.1 march 9, 2006 figure 21. el8170 input offset voltage vs common- mode input voltage @ v s = 3.3v, temperature = -45c, 25c, and 85c figure 22. EL8173 input offset voltage vs common- mode input voltage @ v s = 3.3v, temperature = -45c, 25c, and 85c figure 23. el8170 input offset voltage vs common- mode input voltage @ v s = 2.9v, temperature = -45c, 25c, and 85c figure 24. EL8173 input offset voltage vs common- mode input voltage @ v s = 3.3v, temperature = - 45c, 25c, and 85c figure 25. el8170 input offset voltage vs temperature @ v s = 5.0v figure 26. EL8173 input offset voltage vs temperature @ v s = 5.0v typical performance curves (continued) 0 50 100 150 200 250 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 common-mode input voltage (v) input offset voltage (v) 25c 85c -45c 3.5 -1000 -800 -600 -400 -200 0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 common-mode input voltage (v) input offset voltage (v) 25c 85c -45c 3.5 -100 0 100 200 300 450 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 common-mode input voltage (v) input offset voltage (v) 25c 85c -45c 3.5 -1000 -800 -600 -400 -200 0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 common-mode input voltage (v) input offset voltage (v) 25c 85c -45c 3.5 -750 -500 -250 0 250 500 -50 -25 0 25 50 75 100 125 temperature (degrees c) input offset voltage (uv) 12 samples vs=5v average = 2uv/c temperature (c) -1500 -1000 -500 0 500 1000 1500 -50 -25 0 25 50 75 100 125 temperature (degrees c) input offset voltage (uv) 12 samples vs=5v average = 1.8uv/c temperature (c) el8170, EL8173
9 fn7490.1 march 9, 2006 figure 27. el8170 input offset voltage vs temperature @ v s = 2.9v figure 28. EL8173 input offset voltage vs temperature @ v s = 2.9v figure 29. el8170 cmrr vs frequency figure 30. EL8173 cmrr vs frequency figure 31. el8170 psrr vs frequency figure 32. EL8173 psrr vs frequency typical performance curves (continued) -750 -500 -250 0 250 500 -50 -25 0 25 50 75 100 125 temperature (degrees c) input offset voltage (uv) 12 samples vs=2.9v average = 2.2uv/c temperature (c) -1500 -1000 -500 0 500 1000 1500 -50 -25 0 25 50 75 100 125 temperature (degrees c) input offset voltage (uv) 12 samples vs=2.9v average = 1.38uv/c temperature (c) cmrr (db) frequency (hz) 120 110 100 90 80 70 60 50 40 1 10 100 1k 10k 100k 1m gain=1000 gain=100 cmrr (db) frequency (hz) 1 10 100 1k 10k 100k 1m 120 110 100 90 80 70 60 50 40 gain=1000 gain=100 gain=10 psrr (db) frequency (hz) 120 110 100 90 80 70 60 50 40 1 10 100 1k 10k 100k 1m psrr- psrr+ psrr (db) frequency (hz) 1 10 100 1k 10k 100k 1m 100 90 80 70 60 50 40 psrr- psrr+ 30 20 el8170, EL8173
10 fn7490.1 march 9, 2006 figure 33. el8170 voltage noise density f igure 34. EL8173 voltage noise density figure 35. el8170 and EL8173 current noise density figure 36. el8170 0.1hz to 10hz input voltage noise (gain = 100) figure 37. EL8173 0.1hz to 10hz input voltage noise (gain = 10) typical performance curves (continued) 10 100 10 100 frequency (hz) input voltage noise (nv/ hz) e n @ 1khz = 50nv/ hz 1k 10k 100 10 100 frequency (hz) input voltage noise (nv/ hz) 1k 1k 10k e n @ 1khz = 200nv/ hz 0.01 0.1 1 frequency (hz) current noise (pa/ hz) 10 100 1k 10k i n @ 1khz = 0.1pa/ hz 1s/div 1v/div 1s/div 5v/div el8170, EL8173
11 fn7490.1 march 9, 2006 description of operat ion and applications information product description the el8170 and EL8173 are micropower instrumentation amplifiers (in-amps) which deliver rail-to-rail input amplification and rail-to-rail output swing on a single 2.9v to 5v supply. the el8170 and EL8173 also deliver excellent dc and ac specifications while consuming only 60a typical supply current. because the el8170 and EL8173 provide an independent pair of feedback terminals to set the gain and to adjust output level, these in-amps achieve high common- mode rejection ratio regardless of the tolerance of the gain setting resistors. the EL8173 is internally compensated for a minimum closed loop gain of 10 or greater, well suited for moderate to high gains. for higher gains, the el8170 is internally compensated for a minimum gain of 100. an enable pin is used to reduce power consumption, typically 2.9a, while the instrumentation amplifier is disabled. input protection all input and feedback termina ls of the el8170 and EL8173 have internal esd protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode drop beyond the supply rails. the el8170 has additional back-to-back diodes across the input terminals and also across the feedback terminals. if overdriving the inputs is necessary, the external input current must never exceed 5ma. on the other h and, the EL8173 has no clamps to limit the differential voltage on the input terminals allowing figure 38. el8170 and EL8173 supply current vs supply voltage figure 39. package power dissipation vs ambient temperature figure 40. package power dissipation vs ambient temperature typical performance curves (continued) 23.5 2.5 4.5 70 60 50 40 20 0 supply voltage (v) supply current (a) 5.5 30 10 4 35 909mw j a = 1 1 0 c / w s o 8 1.4 1.2 1 0.8 0.6 0.2 0 power dissipation (w) jedec jesd51-7 high effective thermal conductivity test board 0.4 0 25 50 75 100 150 ambient temperature (c) 125 85 625mw j a = 1 6 0 c / w s o 8 1 0.9 0.8 0.6 0.4 0.1 0 0 25 50 75 100 150 ambient temperature (c) power dissipation (w) 125 85 jedec jesd51-3 low effective thermal conductivity test board 0.2 0.7 0.3 0.5 el8170, EL8173
12 fn7490.1 march 9, 2006 higher differential input voltages at lower gain applications. it is recommended however, that the input terminals of the EL8173 is not overdriven beyond 1v to avoid offset drift. an external series resistor may be used as an external protection to limit excessive external voltage and current from damaging the inputs. input stage and input voltage range the input terminals (in+ and in-) of the el8170 and EL8173 are single differential pair bipolar pnp devices aided by an input range enhancement circuit to increase the headroom of operation of the comm on-mode input voltage. the feedback terminals (fb+ and fb-) also have a similar topology. as a result, the input common-mode voltage range of both the el8170 and EL8173 is rail-to-rail. these in-amps are able to handle input voltages that are at or slightly beyond the supply and ground making these in-amps well suited for single 5v or 3.3v low voltage supply systems. there is no need then to move the common-mode input of the in-amps to achieve symmetrical input voltage. input bias cancellation/compensation inside the el8170 and EL8173 is an input bias cancellation/compensation circuit for both the input and feedback terminals (in+, in-, fb+ and fb-), achieving a low input bias current all throughout the input common-mode range and the operating temper ature range. while the pnp bipolar input stages are biased with an adequate amount of biasing current for speed and increased noise performance, the input bias cancellation/compensation circuit sinks most of the base current of the input transistor leaving a small portion as input bias current, typically 500pa. in addition, the input bias cancellation/compensation circuit maintains a smooth and flat behavior of input bias current over the common mode range and over the operating temperature range. the input bias cancellation/compensation circuit operates from input voltages of 10mv above the negative supply to input voltages slightly above the positive supply. see average input bias cu rrent vs common-mode input voltage in the performance curves section. output stage and output voltage range a pair of complementary mosf et devices drives the output vout to within a few millivolts of the supply rails. at a 100k ? load, the pmos sources cu rrent and pulls the output up to 4mv below the positive supply, while the nmos sinks current and pulls the output do wn to 4mv above the negative supply, or ground in the case of a single supply operation. the current sinking and sourcing capability of the el8170 and EL8173 are internally limited to 29ma. gain setting vin, the potential difference across in+ and in-, is replicated (less the input offset voltage) across fb+ and fb-. the obsession of the el8170 and EL8173 in-amp is to maintain the differential voltage across fb+ and fb- equal to in+ and in-; (fb+ - fb-) = (in+ - in-). consequently, the transfer function can be derived. the ga in of the el8170 and EL8173 is set by two external resistor s, the feedback resistor rf, and the gain resistor rg. in figure 41, the fb+ pin and one end of resistor rg are connected to gnd. with this configuration, the above gain equation is only true for a pos itive swing in vin; negative input swings will be ignored and the output will be at ground. reference connection unlike a three-op amp instrumentation amplifier, a finite series resistance seen at the ref terminal does not degrade the el8170 and EL8173's high cmrr performance eliminating the need for an additional external buffer amplifier. figure 42 uses the fb+ pin to provide a high impedance ref terminal. . 1 3 2 8 5 4 7 6 + - + - in+ in- fb+ fb- vs+ vs- en 2.9v to 5v rf rg vout en_bar el8170/3 vcm vin/2 vin/2 figure 41. gain is set by two external resistors, r f and r g vout 1 r f r g -------- + ?? ?? ?? vin = figure 42. gain setting and reference connection 1 3 2 8 5 4 7 6 + - + - in+ in- fb+ fb- vs+ vs- en 2.9v to 5v rf rg vout en_bar el8170/3 vcm vin/2 vin/2 ref 2.9v to 5v r1 r2 vout 1 r f r g -------- + ?? ?? ?? vin () 1 r f r g -------- + ?? ?? ?? vref () + = el8170, EL8173
13 fn7490.1 march 9, 2006 the fb+ pin is used as a ref te rminal to center or to adjust the output. because the fb+ pin is a high impedance input, an economical resistor divider can be used to set the voltage at the ref terminal without degrading or affecting the cmrr performance. any voltage applied to the ref terminal will shift vout by vref times the closed loop gain, which is set by resistors rf and rg. see figure 42. the fb+ pin can also be connected to the other end of resistor, rg. see figure 43. keeping the basic concept that the el8170 and EL8173 in-amps maintain constant differential voltage across the input terminals and feedback terminals (in+ - in- = fb+ - fb-), the transfer function of figure 43 can be derived. a finite resistance rs in series with the vref source, adds an output offset of vin*(rs/rg). as the series resistance rs approaches zero, the gain equation is simplified to the above equation for figure 43. vout is simply shifted by an amount vref. external resistor mismatches because of the independent pair of feedback terminals provided by the el8170 and EL8173, the cmrr is not degraded by any resistor mismatches. hence, unlike a three op amp and especially a two op amp in-amp, the el8170 and EL8173 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing cmrr performance. the el8170 and EL8173 cmrr will be 108db regardless of the tolerance of the resistors used. gain error and accuracy the EL8173 has a gain error, eg, of 0.2% typical. the el8170 has an eg of 0.3% typica l. the gain error indicated in the electrical specifications table is the inherent gain error of the el8170 and EL8173 and does not include the gain error contributed by the resistors. there is an additional gain error due to the tolerance of the resistors used. the resulting non-ideal transfer function effectively becomes: where: erg = tolerance of rg erf = tolerance of rf eg = gain error of the el8170 or EL8173 the term [1 - (erg +erf +e g)] is the deviation from the theoretical gain. thus, (erg +erf +eg) is the total gain error. for example, if 1% resistors are used for the el8170, the total gain error would be: disable/power-down the el8170 and EL8173 can be powered down reducing the supply current to typically 2.9a. when disabled, the output is in a high impedance state. the active low enable bar pin has an internal pull down and hence can be left floating and the in-amp enabled by default. when the enable bar is connected to an external logic, the in-amp will power down when enable bar is pulled above 2v, and will power on when enable bar is pulled below 0.8v. figure 43. reference connectionwith an available vref 1 3 2 8 5 4 7 6 + - + - in+ in- fb+ fb- vs+ vs- en 2.9v to 5v rf rg vout en_bar el8170/3 vcm vin/2 vin/2 vref vout 1 r f r g -------- + ?? ?? ?? vin () vref () + = vout 1 r f r g -------- + ?? ?? ?? 1e rg e rf e g ++ () ? [] vin = e rg e rf e g typical () ++ () = 0.01 0.01 0.003 ++ () = 2.3% = el8170, EL8173
14 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7490.1 march 9, 2006 package outline drawing note: the package drawing shown here may not be the latest version. to check the latest revision, please refer to the intersil w ebsite at http://www.intersil.com/design/packages/index.asp el8170, EL8173

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